This invention relates, in general, to data processors which are made on a monolithic integrated circuit, and more particularly, to data processors having a single input clock signal.
In the past many monolithic integrated circuit chips having microprocessors or data processors provided two external pins for connection to an external crystal or oscillator. From the input, on these two external pins internal circuitry generated non-overlapping clock signals which were used for synchronization purposes within the integrated circuit. In addition one of the nonoverlapping clock signals was connected to yet a third external pin so that external peripheral devices coupled to a monolithic integrated circuit could use the signal on this third external pin for synchronizing purposes.
As data processor circuits become more complex it is desirable to have more data processing type of signals on interface pins of the monolithic integrated circuit chip but yet not to increase the number of external pins. Increasing the number of external pins generally tends to increase the physical size of the integrated circuit chip and could result in the monolithic integrated circuit chip being in a non-standard package. One way to decrease the number of external pins provided for clock signals would be to integrate the oscillator as part of the monolithic chip, however, crystals are usually required for high accuracy oscillators and cannot be integrated as part of a monolithic integrated circuit chip. The disadvantages of making a clock frequency generating circuit as part of the monolithic integrated circuit are that the cost of the chip would be increased and the end user of the chip could not easily control the clock frequency. The end user generally wants control of the clock frequency for purposes such as controlling slow memories.
Accordingly, it is an object of the present invention to provide a monolithic integrated circuit chip having a microprocessor and only requiring a single interface pin for receiving a clock input signal.